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AD724JR
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AD724JR

  • 所属类别:模拟开关
  • 产品名称:RGB转NTSC/PAL编码器
  • 厂商:AD
  • 生产批号:15+
  • 封装:SOP-8
  • 库存状态:有库存
  • 库存量:5000
  • 最低订购量:10
  • 详细资料:点击查找AD724JR的pdf资料
  • 点击询价
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  • Product Introduction

AD724JR brand new original is produced by AD original factory, using SOP-8 package, batch number 15+, Microchip century-old integrated circuit warehouse is currently in stock

Advantages and features:

  • 低成本集成解决方案
  • +5 V电源供电
  • 接受FSC时钟、晶振或4 FSC时钟
  • 只需极少的外部元件:
    无需外部滤波器或延迟线
    片上直流箝位
    接受HSYNC与VSYNC或CSYNC
  • 复合视频和独立Y/C(S-视频)输出
  • 亮度和色度输出具有时序一致性
  • 相位锁定至外部副载波
  • 驱动75 Ω反向端接负载
  • 逻辑可选的NTSC或PAL编码模式
  • 紧凑的16引脚SOIC封装

Product Details:

The AD724 is a low-cost RGB-to-NTSC/PAL encoder that converts red, green, and blue component signals into corresponding brightness (baseband amplitude) and chromatic (subcarrier amplitude and phase) signals that meet NTSC or PAL standards. At the same time, these two outputs are combined to provide a composite video output. All three outputs can drive 75 Ω, reverse-terminated cables simultaneously. All logic inputs are CMOS compatible. The chip is powered by a single +5 V supply; No external delay lines or filters are required. The device can be shut down when not in use.

The AD724 accepts FSC or 4FSC clocks. When clockless is available, a low-cost parallel resonant crystal (3.58 MHz (NTSC) or 4.43 MHz (PAL)) together with the device's on-chip oscillator generates the necessary subcarrier clocks. The AD724 also accepts subcarrier clocks provided by external video sources.

The interface to the graphics controller is simple: the on-chip logic "XNOR" accepts the available vertical sync (VSYNC) and horizontal synchronization (HSYNC) signals and generates a composite synchronization (CSYNC) signal on-chip. If available, the AD724 can also accept standard CSYNC signals by connecting VSYNC to +5 V and applying CSYNC to the HSYNC pin. The device has built-in decoding logic that identifies efficient horizontal synchronization pulses for proper insertion of burst pulses.

The delays of the U and V chroma filters are matched by the delay line of the on-chip sampling data in the Y signal path. To prevent aliasing, the delay line is preceded by a 5 MHz pre-filter and followed by a 5 MHz post-filter to suppress harmonics in the output. These low-pass filters are optimized for minimal pulse overshoot. The overall brightness delay is temporal consistent relative to chroma and can be fed directly into the TV baseband. The AD724 is available in a space-saving SOIC package and is rated for a commercial temperature range of 0°C to +70°C.

 

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