ADC10040QCIMT

• Single 3.0 V operation
• Optional 2.0 V PP, 1.5 V PP, or 1.0 V PP full-scale input swing
• -3 dB input bandwidth of 400 MHz
• Low power consumption
• Standby mode
• On-chip reference and sampling with hold amplifiers
• offset binary or complement data format
• Supply of independent adjustable output drivers to accommodate homes with 2.5V and 3.3V logic
• AEC - Q100 Standard Level 3 qualified
• 28-pin TSSOP package

illustrate

ADC10040 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals to 10 digits at up to 40 per second (MSPS). The converter uses a differential pipeline architecture, digital error correction and on-chip sampling and holding circuitry to provide a complete conversion solution with minimal power consumption while delivering excellent power performance. A unique sampling and holding phase produces full power bandwidth 400 MHz. A single 3.0V supply operates, and the device consumes only a single supply 55.5 milliwatts at 40 MSPS， Includes reference current. The standby function only reduces power consumption 13.5 milliwatts.

Differential inputs are available in a full scale of 2.0 V PP, 1.5 V PP, 1.0 V PP, and selectable input swings provide the possibility of a single-ended input. Making the most of differential inputs is recommended for optimal performance. The internal 1.2 V precision bandgap reference is used to set the ADC's full-scale range and also allows the user to provide a buffered reference voltage for applications where increased accuracy is required. The output data format is the offset binary or complement of the user chooses.

ADC10040Q runs an automotive-grade flow rate and AEC-Q100 standard Level 3 qualified.

This device is available in a 28-lead TSSOP package and will operate in an industrial temperature range of -40°C to +85°C.

Key specifications:

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• Ultrasound and imaging
• instrumentation
• Cellular base stations/communication receivers
• Sonar/radar
• xDSL
• Wireless local loop
• Data acquisition system
• The reception of DSP ends