peculiarity
Operates only with a 1.8V power supply.
Power adjusts clock frequency.
Internal sampling and retention.
Internal or external references.
Power-off mode.
Offsets binary or two's complement output data format.
LVDS or CMOS output signals.
60-pin LLP package (9x9x0.8mm, 0.5-pin pitch)
Clock duty cycle stabilizer.
If the sampling bandwidth > 900MHz,
illustrate
The ADC10DV200 is a monolithic analog-to-digital converter that converts two analog input signals into 10-bit digits, achieving a sampling rate of up to 200 megapixels per second (MSPS). Digital output mode is selectable and can be differential LVDS or CMOS signals. This converter uses digital error correction and a differential pipeline architecture with on-chip sampling and retention circuits to minimize die size and power consumption while delivering excellent dynamic performance. A unique sampling and retention phase produces a full-power bandwidth of 900MHz. Manufactured using the core CMOS process, ADC10DV200 can operate from a single 1.8V power supply. " ADC10DV200 Nyquist achieves about 9.6 effective bits and consumption at 200MSPS in CMOS mode and 450MW LVDS mode, 170MSPS at 280mW. By lowering the sampling rate, power consumption can be further reduced.
Key specifications:
resolution
10th place
Conversion rate
200 MSPS
ENOB
9. 6 bits (typical value) when @鱼翅 = 70MHz
signal-to-noise ratio
59.9 dBFS (typical) value at @鱼翅 = 70MHz
SINAD
59.9 dBFS (typical) value at @鱼翅 = 70MHz
Spurious-Free Dynamic Range (SFDR)
82 dBFS (typical value) @鱼翅 = 70MHz
LVDS power supply
450MW (typical) @ FS = 200MSPS
CMOS power supply
280mW (typical) @ FS = 170MSPS
Operating temperature. Scope
-40°C to +85°C.
apply
Communication
Medical imaging
Portable instruments
Digital video