ADL5391凝聚了ADI公司三十年的先进模拟乘法器技术经验，以下通用数学函数经实践证明，在函数合成方面拥有出色广泛的用途：V
W = α × (V
X x V
Y)/1 V + V
Z
ADL5391 most significant improvement is the adoption of a new multiplier kernel architecture, which is significantly different from the traditional architecture that has been in use since 1970. Traditional architectures use current-mode, cross-wire cores that are completely asymmetrical relative to the X and Y inputs, resulting in misalignment of amplitude and timing, which can be problematic at high frequencies. The new multiplier core provides symmetrical signal paths for the X and Y inputs, eliminating these misalignments. The Z input allows the signal to be added directly to the output, eliminating the need for a carrier or the application of a static offset voltage.
ADL5391 is manufactured using Analog Devices' proprietary high-performance 65 GHz SOI complementary SiGe bipolar IC process and is available in a 16-pin lead-free LFCSP package with an operating temperature range of -40°C to +85°C and an evaluation kit.