DS91C176TMAX

• DC to 100 MHz +/200+ Mbps with low power consumption, low EMI operation
• For ATCA optimization, UTCA clock allocation network
• Meets or exceeds TIA/EIA-899 M - LVDS standards
• Wide input noise increases the immune common-mode voltage
• DS91D176 type 1 receiver input
• Types of DS91C176 with fail-safe 2 receivers
• Industrial temperature range
• Space-saving SOIC-8 package

illustrate

In DS91C176 and DS91D176 are 100 MHz single-channel M-LVDS (multipoint low-voltage differential signal) applications utilizing multipoint networks (e.g., transceivers designed based on ATCA and UTCA clock distribution systems). M-LVDS is a new bus interface standard (TIA/EIA-899) optimization for multipoint networks. Edge rate control, tight input receiver thresholds and increased driving force are ideal for SONG distribution, enabling network signals to pass through multi-point M-LVDS devices with ideal key enhancments.

The DS91C176/DS91D176 is a half-duplex transceiver that accepts the LVTTL/LVCMOS signal at the driver input and converts it into a differential M-LVDS signal. The receiver input accepts a low-voltage differential signal (LVDS, B-LVDS, M-LVDS, LV-PECL, and CML) and converts it to a 3V LVCMOS signal. The DS91D176 has no offset M-LVDS receiver input type 1. In DS91C176 there is an M-LVDS receiver that enables Type 2 fault protection function.