SN65HVD10

illustrate

The SN65HVD10, SN75HVD10, SN65HVD11, SN75HVD11, SN65HVD12, and SN75HVD12 combine a three-state differential line driver and a differential input line receiver to operate from a 3.3 V supply. They are designed for balanced transmission lines that meet or exceed ANSI standards and ISO 8482:1993 TIA/EIA-485-A. These differential bus transceivers are monolithic integrated circuits designed for multipoint bidirectional data bus transmission line communication. The driver and receiver are active high, low level is enabled respectively and can be externally connected together for function-oriented control. Very low device backup supply current can be disabled by the driver and receiver.

The driver differential output and receiver differential input are connected internally to form a differential input/output (I/O) bus port designed to provide the lowest load when the bus driver is disabled_VCC's = 0.

characteristic

• Operating, with a 3.3 V supply
• The bus pin ESD protects HBM over 16 kV
• 1/8 unit load option available (up to 256 bus nodes)
• The selectable driver outputs are 32 Mbps transition Mbps and signal transmission rate^（1）is 1 Mbps, 10
• Meet or exceed the required ANSI TIA/EIA-485-A
• The bus pin is protected from a short circuit of -7 V, 12 volts
• Low current standby mode. 。 0.1 μA typical
• Open, idle bus, and short-circuit bus fault protection receivers
• Thermal shutdown protection
• Interference-free and brownout protection for hot-swap applications
• Footprint of SN75176
• apply
  • Digital motor control
  • ammeter
  • Chassis-to-chassis interconnect
  • Electronic security station
  • Industrial process control
  • Building automation
  • Point, point-of-sale (POS) terminals, and networks