DS90LV011ATMF

• Shift clock support from 20 to 66 MHz
• 50% of the receiver output clock duty cycle
• The most advanced settings and hold time on RxOUTPUTs
• RX功率消耗
• 接收掉电模式
• ESD Rating> 7kV (HBM), > 700V (EIAJ)
• PLLs require no external components
• Compliant with TIA/EIA-644 LVDS standard
• Low-profile 56-pin or 48-pin TSSOP packages
• Operating temperature: -40°C to +85°C
• Automotive Class Q available - qualified with AEC - Q100 standard Level 3

illustrate

The DS90CR286A 4 LVDS receivers convert data streams (up to 1.848 Gbps throughput or 231 MB/s bandwidth) 28 parallel CMOS/TTL data bits. It also provides DS90CR216A conversion into three LVDS streams (up to 1.386 Gbps throughput or 173 MB/s bandwidth) into 21st parallel CMOS/TTL data bits. Two receivers' rising edge output gating.

Both devices are available in TSSOP packages.

This DS90CR286A/DS90CR216A device strengthens the previous generation receiver and provides a wider output effective time on the data receiver.

This chipset is an ideal means to solve problems related to EMI and TTL interfaces with cable size, width, high rotational speed