DS90LV028ATLD

• > 400 Mbps (200 MHz) switching rate
• 50 PS differential offset (typical)
• 0.1 ns channel-to-channel skew (typical)
• Maximum propagation delay of 2.5 ns
• 3.3V power supply design
• Flow through the pinout
• Under high impedance power supply LVDS input
• Low Power Design (18mW@3.3V Static)
• Interoperable networks with existing 5V LVDS
• Accepts small swing (350 mV typical) differential signal levels
• Supports open, short, and stop input fail-safe
• Complies with ANSI/TIA/EIA-644 standards
• Industrial temperature operating range (-40 °C to +85 °C)
• Available in SOIC and space-saving LLP packages

illustrate

The DS90LV028A is a dual CMOS differential line receiver designed for applications requiring ultra-low power, low noise, and high data rates. The device is designed to support data rates exceeding 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology (200 MHz).

The DS90LV028A accepts low-voltage (350 mV typical) differential input signals and converts them to a 3V CMOS output level. The receiver also supports open, short circuit and termination (100 Enter failsafe. The receiver output will be used for all fail-safe conditions high. The DS90LV028A has a simple PCB layout flow design.

The DS90LV028A and companion LVDS line drivers provide a new choice for high-power PECL/ECL high-speed point-to-point interface applications.