DS91C176TMAX

• Low power, low EMI operation from DC to 100 MHz+/200+ Mbps
• For ATCA optimization, UTCA clock distribution network
• Meets or exceeds TIA/EIA-899 M - LVDS standards
• Wide input noise increases the immune common-mode voltage
• Type 1 receiver input for the DS91D176
• Types of DS91C176 and fail-safe 2 receivers
• Industrial temperature range
• Space-saving SOIC-8 package

illustrate

In applications where the DS91C176 and DS91D176 are 100 MHz single-channel M-LVDS (multipoint low-voltage differential signaling), transceivers designed using multipoint networks (e.g., in ATCA and UTCA-based clock distribution systems). M - LVDS is a new bus interface standard (TIA/EIA-899) optimization of multipoint networks. Edge rate control, tight input receiver thresholds and increased driving force are ideal keys for Song's distribution, enabling network signals to pass through multipoint M-LVDS devices.

The DS91C176/DS91D176 are half-duplex transceivers that accept LVTTL/LVCMOS signals at the driver input and convert them to differential M-LVDS signals. The receiver input accepts low-voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL AND CML) AND CONVERTS THEM TO A 3V LVCMOS signal. The DS91D176 has no offset M-LVDS receiver input type 1. The DS91C176 has an M-LVDS receiver that enables Type 2 fault protection functionality.