AD9236
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AD9236

  • Category:converter
  • Product Name:12-bit, 80 MSPS, 3 V analog-to-digital converter (ADC)
  • Manufacturers:AD
  • Production Batch Number:12+
  • Encapsulation:TSSOP-28
  • Stock Status:There is stock
  • Stock Quantity:9080
  • Minimum order quantity: 1
  • Details:Click here to find pdf information for the AD9236
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  • Product introduction

AD9236 12-Bit, 80 MSPS, 3 V Analog-to-Digital Converter (ADC)

The AD9236 is a monolithic, 12-bit, 80 MSPS analog-to-digital converter (ADC) that operates from a single 3 V supply and contains a high performance track-and-hold amplifier (SHA) and reference. It features a multistage differential pipelined architecture with built-in output error correction logic, 12-bit accuracy at 80 MSPS data rates, and guaranteed no missing codes over the entire operating temperature range.

With a wide bandwidth, true differential track-and-hold amplifier (SHA), the user can select a variety of input ranges and offsets, including single-ended applications. The device is suitable for multiplexing systems that switch full-scale levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. The AD9236 consumes less power than previous analog-to-digital converters and is suitable for applications such as communications, imaging, and medical ultrasound.

A single-ended clock input is used to control all internal conversion cycles. A duty cycle stabilizer (DCS) is used to compensate for large clock duty cycle fluctuations while maintaining excellent performance. The digital output data format is standard binary or twos complement. Overrange (OTR) signals indicate overflow conditions, and the most significant bit can be used to determine whether it is underflow or overflow.

Manufactured using an advanced CMOS process, the AD9236 is available in 28-lead TSSOP and 32-lead LFCSP packages and is specified over the -40°C to +85°C industrial temperature range.

Features and benefits

  • 3 V single-supply operation (2.7 V to 3.6 V)
  • Signal-to-noise ratio (SNR): 70.4 dBc to Nyquist frequency
  • Spurious-free dynamic range (SFDR):
    87.8 dBc to Nyquist frequency
  • Low power: 366 mW at 80 MSPS
  • Low power: 366 mW at 80 MSPS
  • On-chip reference and SHA
  • Differential Nonlinearity (DNL): ±0.4 LSB
  • Flexible analog input range: 1 V p-p to 2 V p-p
  • Data format: offset binary or twos complement
  • Clock duty cycle stabilizer

//www.chip100.com/

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