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ADSP-TS201SABPZ050
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ADSP-TS201SABPZ050

  • Category:Microprocessor/Microcontroller (MicroP/C)
  • Product Name:500/600MHz TigerSHARC processor with 24Mbit on-chip embedded DRAM
  • Manufacturers:ADI
  • Production Batch Number:15+
  • Encapsulation:576 ball SBGA
  • Stock Status:There is stock
  • Stock Quantity:20
  • Minimum order quantity: 1
  • Details:Click here to find pdf information on the ADSP-TS201SABPZ050
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  • Product introduction

Advantages and features

  • The static superscalar architecture supports 1-, 8-, 16-, and 32-bit fixed-point and floating-point data processing
  • High-performance 600 MHz, 1.67 ns instruction rate DSP core
  • 24 Mbit on-chip SRAM, using user-defined partitions, internally divided into 6 zones
  • Static Superscalar architecture which supports 1, 8, 16 and 32-bit fixed point as well as floating point data processing
  • 14-channel, zero-overhead DMA controller
  • High performance up to 600 MHz, 1.67 ns instruction rate DSP core
  • 24 Mbit on-chip embedded DRAM internally organized in six banks with user-defined partitioning
  • An enhanced communications instruction set for wireless infrastructure applications allows TigerSHARC to provide complete baseband processing
  • Four internal 128-bit wide internal buses provide a total storage bandwidth of 38.4 Gbyte per second
  • Enhanced communications instruction set for wireless infrastructure applications allows for the TigerSHARC Processor to offer complete baseband processing
  • 14 channel, zero overhead DMA controller
  • The software-defined radio approach enables multiple wireless telecommunications standards to adopt a single platform
  • Four internal 128-bit wide internal buses providing a total memory bandwidth of 38.4 Gbytes per second
  • Single instruction multiple data (SIMD) operation, supported by 2 compute blocks, each with an ALU, multiplier, phase shifter, and 32-word register file
  • Software radio approach allows for the adoption of a single platform for multiple wireless telecommunication standards
  • Assembly and C programming skills
  • Single instruction multiple-data (SIMD) operation supported by two computation blocks each with an ALU, multiplier, shifter and 32-word register file
  • Assembly and C language programmability

Product Classification

Processor and DSP


field

Security and surveillance

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  • Product details

    ADSP-TS201SIt is one of the latest devices in the TigerSHARC processor family. Analog Devices' TigerSHARC processors are ideal for the video and communications markets, including 3G cellular and broadband wireless base stations, as well as defense, medical imaging, and industrial instrumentation for a wide range of signal processing applications that rely on multiple processors working together to perform compute-intensive real-time functions. The ADSP-TS201S uses a static superscalar architecture that combines RISC, VLIW, and standard DSP functionality. Inherent support for fixed-point and floating-point data types, combined with leading multiprocessing capabilities, enables TigerSHARC processors to deliver unmatched DSP performance. At 600MHz, the ADSP-TS201S offers the industry's highest 16-bit fixed-point performance and 32-bit floating-point performance. The ADSP-TS201S has a 1024-point complex FFT time of 16.8μs and offers 1500MFLOPs/W performance.

    ADSP-TS201S Performance:

    - High-performance 600MHz, 1.67ns instruction rate DSP core
    - Each cycle can execute 8 16-bit MAC instructions with 40-bit accumulation or 2 32-bit MAC instructions with 80-bit accumulation
    - Perform 6 single-precision floating-point operations or 24 16-bit fixed-point operations per cycle (3.6GFLOPS or 14.4GOPS performance)
    - Dual-cycle, interlocked execution channels
    - Parallelism allows up to four 32-bit instructions to be executed per cycle

    The ADSP-TS201S is available in low cost BGA packages × 25 mm. TigerSHARC processors are now available for general purpose samples.



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ADSP-TS101SAB2-000 ADI 15+ 625 ball BGA 300 MHz TigerSHARC processor with built-in 6 Mb on-chip SRAM
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