AD5323BRU

The AD5303/AD5313/AD5323 are dual 8-, 10-, and 12-bit, buffered voltage output DACs available in a 16-lead TSSOP package and operate from a single 2.5 V to 5.5 V supply and consume 230 μA at 3 V. These devices include an on-chip output amplifier that provides rail-to-rail output swing with a slew rate of 0.7 V/μs. THE AD5303/AD5313/AD5323 FEATURE A VERSATILE 3-WIRE SERIAL INTERFACE CAPABLE OF OPERATING AT CLOCK RATES UP TO 30 UMHz and are compatible with standard spi, qspi,™ microwire™, and dsp interface standards.

The reference voltage for both DACs is derived from the two reference pins (one pin for one DAC). These reference inputs can be configured as buffered or unbuffered inputs. Each device contains a power-on reset circuit that ensures that the DAC output powers up to 0 V and remains at that level until a valid write is performed on the device. There is also an asynchronous active-low CLR pin that clears both DACs to 0 V. The asynchronous LDAC input allows the outputs of both DACs to be updated simultaneously. It also features a power-down feature that reduces the device's power consumption to 200 nA at 5 V (50 nA at 3 V) in power-down mode, with a software-selectable output load. These devices can also be used in daisy-chain applications via the SDO pin.

In normal operating mode, these devices feature low power consumption, making them ideal for portable battery-powered devices. Power consumption is 1.5 mW at 5 V, 0.7 mW at 3 V, and down to 1 μW in power-down mode.

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