The AD5381 is a complete single-supply, 40-channel, 12-bit DAC available in a 100-lead LQFP package. All 40 channels have an on-chip output that operates rail-to-rail
amplifier。 The device contains a programmable 1.25 V/2.5 V, 10 ppm/°C reference. On-chip channel monitoring multiplexes analog outputs to a common MON_OUT pin for external monitoring, and output amplifier boost mode optimizes amplifier slew rate. The AD5381 contains a double-buffered parallel interface with a WR pulse width of 20 ns, an SPI/QSPI/MICROWIRE/DSP-compatible serial interface with interface speeds greater than 30 MHz, and an I that supports 400 kHz data transfer rates
2C-compatible interface.
Input registers The post-DAC registers provide double buffering, allowing each DAC output to be updated independently or simultaneously using the LDAC input.
Each channel has programmable gain and offset adjustment registers, allowing the user to fully calibrate any DAC channel. With boost mode disabled, the device typically consumes 0.25 mA per channel.
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- Variable Light Attenuator (VOA)
- Level Setting (ATE)
- Opto-microelectromechanical systems (MEMS)
- Control system
- Instrumentation