AD6643BCPZ-250 high performance analog-to-digital converter
The AD6643 is an 11-bit, 250 MSPS, dual intermediate frequency (IF) receiver designed to support multi-antenna systems in telecom applications requiring high dynamic range performance, low power, and small size.
The device includes two high-performance analog-to-digital componentsconverter(ADC) and noise shaping requantizer (NSR) digital blocks. Each ADC uses a multistage, differential pipelined architecture with integrated output error correction logic. The first stage of the ADC differential pipeline contains a wide bandwidth switched capacitor sampling network. An integrated reference simplifies design. The duty cycle stabilizer (DCS) compensates for fluctuations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.
The outputs of each ADC are internally connected to the NSR block. Integrated NSR circuitry improves signal-to-noise ratio (SNR) performance in smaller bands within the Nyquist bandwidth. The device supports two different output modes, which can be selected via the external MODE pin or SPI.apply
-correspondence
- Diversity radio and smart antenna (MIMO) systems
- Multi-mode digital receiver (3G)
WCDMA, LTE, CDMA2000
WiMAX, TD-SCDMA
- I/Q demodulation system
- Universal software radio
Product features
1. Two ADCs are integrated in a small, space-saving 9 mm × 9 mm × 0.85 mm, 64-lead LFCSP package.
2. Pin-selectable noise shaping requantizer (NSR) improves signal-to-noise ratio when bandwidth is reduced to a maximum of 60 MHz and 185 MSPS.
3. LVDS digital output interface is configured for low-cost FPGA series.
4. Operates from a single 1.8 V supply.
5. The standard serial port interface (SPI) supports various product features and functions, such as: data formatting (offset binary or twos complement), NSR, shutdown, test mode, and reference mode.