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AD9249BBCZRL7-65
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AD9249BBCZRL7-65

  • Category:ADC analog-to-digital converter
  • Product Name:16-channel, 14-bit, 65 MSPS, serial LVDS, 1.8 V ADC
  • Manufacturers:AD
  • Production Batch Number:15+
  • Encapsulation:144 ball CSPBGA
  • Stock Status:There is stock
  • Stock Quantity:2330
  • Minimum order quantity: 1
  • Details:Click here to find pdf of the AD9249BBCZRL7-65
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  • Product introduction

Advantages and features

  • Low power consumption:
    Sixteen ADC channels are integrated in a single package
    58 mW per channel at 65 MSPS, adjustable power options
    35 mW per channel at 20 MSPS
  • Signal-to-noise ratio (SNR): 75 dBFS (to Nyquist frequency); spurious-free dynamic range (SFDR): 90 dBc to Nyquist frequency
  • Differential nonlinearity (DNL): ±0.6 LSB (typical); Integral nonlinearity (INL): ±0.9 LSB (typical)
  • Worst-case adjacent crosstalk at 10 MHz, −1 dBFS: -90 dB typical
  • Serial LVDS (ANSI-644, default)
    Low power consumption, signal reduction options (similar to IEEE 1596.3)
  • Data clock output and frame clock output
  • 650 MHz full power analog bandwidth
  • 2 V p-p input voltage range
  • 1.8 V power supply
  • Product details

    The AD9249 is a 16-channel, 14-bit, 65 MSPSAnalog-to-digital converters(ADC) with on-chip sample-and-hold circuitry designed for low cost, low power, small size, and ease of use. With slew rates up to 65 MSPS, the device offers excellent dynamic performance and low power consumption, making it ideal for applications where small package size is important.


    The ADC requires a single 1.8 V supply operation and an LVPECL/CMOS/LVDS-compatible sample-rate clock signal to operate at full performance. No external reference or driver is required to meet many application needs.


    The AD9249 automatically multiplies the sample rate clock to produce the appropriate LVDS serial data rate. It provides data clock outputs (DCO±1, DCO±2) for capturing data at the output and frame clock outputs (FCO±1, FCO±2) for sending new output byte signals. Support independent shutdown of each channel; With all channels disabled, the device typically consumes less than 2 mW.


    The ADC includes features that provide optimal flexibility and minimal system cost, such as programmable clock and data alignment, and generation of programmable digital test patterns.


    Available digital test codes include built-in fixed and pseudo-random codes, as well as user-defined test codes input via the serial port interface (SPI).


    AD9249It is available in a RoHS-compliant 144-pin CSP-BGA package. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.


    Product features

    1. Small size. Sixteen ADCs are integrated in a small 10 mm × 10 mm package.
    2. Low power: 35 mW per channel (20 MSPS, adjustable power options).
    3. Easy to use. The data clock outputs (DCO±1, DCO±2) operate at frequencies up to 455 MHz and support double data rate (DDR) operation.
    4. Flexible to use. SPI control offers a wealth of flexible features to meet the needs of a variety of specific systems.

    apply

    • Medical imaging
    • Communication receiver
    • Multi-channel data acquisition

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AD9249BBCZRL7-65 AD 15+ 144 ball CSPBGA 16-channel, 14-bit, 65 MSPS, serial LVDS, 1.8 V ADC

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