AD9261-10EBZ

• Product Introduction

The AD9261-10EBZ is a 16-bit, 10 MHz bandwidth, 30 MSPS to 160 MSPS, continuous-time sigma-delta ADC 

The AD9261 is a 16-bit analog-to-digital converter (ADC) that uses a continuous-time sigma-delta architecture to achieve 86 dB of dynamic range over a 10 MHz input bandwidth. The integrated functions and features unique to the continuous-time sigma-delta architecture greatly simplify its use and minimize the external elements required.

The AD9261 features a resistive input impedance that significantly reduces the requirements placed on the driver amplifier. In addition, a 32x oversampled 5th order continuous time loop filter significantly attenuates out-of-band signals and aliasing, eliminating the need for an external filter at the input.

An external clock input or an integrated integer N-division phase-locked loop (PLL) provides the 640 MHz internal clock required for an oversampled continuous-time sigma-delta modulator. The on-chip decimation filter and sample rate converter reduce the modulator data rate from 640 MSPS to a user-defined output data rate (30 MSPS to 160 MSPS) for a more efficient and straightforward interface.

The digital output data format is offset binary, gray code, or binary complement. The Data Clock Output (DCO) is used to ensure that the receive logic works in the correct timing.

The AD9261 operates from a 1.8 V analog supply and a 1.8 V to 3.3 V digital supply with a power consumption of 375 mW. It is available in a 48-pin LFCSP package and is rated for a temperature range of −40°C to +85°C industrial temperatures.

Product Focus

1. 连续时间Σ-Δ架构可有效实现高动态范围和宽带宽。
2. 无源输入结构可降低对驱动器放大器的要求，或者省去驱动器放大器。
3. 32倍过采样率和高阶环路滤波器可提供出色的混叠抑制性能，降低对抗混叠滤波器的要求，或者省去抗混叠滤波器。
4. 集成的抽取滤波器、采样速率转换器、PLL时钟乘法器和基准电压源使该器件易于使用。
5. 采用1.8 V单模拟电源和1.8 V至3.3 V输出电源供电。
6. 标准串行端口接口(SPI)支持各种产品特性和功能。