AD9261BCPZRL7-10
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AD9261BCPZRL7-10

  • Category:converter
  • Product Name:16-bit, 10 MHz bandwidth, 30 MSPS to 160 MSPS, continuous-time sigma-delta ADC
  • Manufacturers:AD
  • Production Batch Number:12+
  • Encapsulation:48LFCSP
  • Stock Status:There is stock
  • Stock Quantity:45000
  • Minimum order quantity: 1
  • Details:Click here to find pdf documentation for the AD9261BCPZRL7-10
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  • Product introduction

AD9261BCPZRL7-10 16-bit, 10 MHz bandwidth, 30 MSPS to 160 MSPS, continuous-time sigma-delta ADC

The AD9261 is a 16-bit analog-to-digital converter (ADC) that uses a continuous-time sigma-delta architecture to achieve 86 dB of dynamic range over a 10 MHz input bandwidth. The unique integrated functions and features of the continuous-time sigma-delta architecture greatly simplify its use and minimize the external components required.

The AD9261 has a resistive input impedance that significantly reduces the need for the driveramplifierrequirements. In addition, a 32x oversampled fifth-order continuous time loop filter significantly attenuates out-of-band signals and aliasing, eliminating the need for an external filter at the input.

An external clock input or an integrated integer-N phase-locked loop (PLL) provides the 640 MHz internal clock required for an oversampled continuous-time sigma-delta modulator. On-chip decimation filters and sample rate converters reduce the modulator data rate from 640 MSPS to a user-defined output data rate (30 MSPS to 160 MSPS), enabling a more efficient and straightforward interface.

The digital output data is formatted as offset binary, gray code, or twos complement. The data clock output (DCO) is used to ensure that the receive logic is operating in the correct timing.

The AD9261 operates from a 1.8 V analog supply and a 1.8 V to 3.3 V digital supply and consumes 375 mW. It is available in a 48-pin LFCSP package and is specified over the industrial temperature range of −40°C to +85°C.

Product Focus

  1. The continuous-time sigma-delta architecture effectively achieves high dynamic range and wide bandwidth.
  2. The passive input structure reduces or eliminates the driver amplifier requirements.
  3. A 32x oversampling rate and a high-order loop filter provide excellent alias rejection, reducing the need for anti-aliasing filters or eliminating the need for anti-aliasing filters.
  4. An integrated decimation filter, sample rate converter, PLL clock multiplier, and voltage reference make the device easy to use.
  5. It operates from a single 1.8 V analog supply and a 1.8 V to 3.3 V output supply.
  6. The standard serial port interface (SPI) supports a variety of product features and functionality.

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Model Manufacturers lot number encapsulation illustrate
AD9261BCPZRL7-10 AD 12+ 48LFCSP 16-bit, 10 MHz bandwidth, 30 MSPS to 160 MSPS, continuous-time sigma-delta ADC

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