The AD9265 is a 16-bit, 125 MSPS analog-to-digital converter (ADC) designed to support communication applications that require high performance, low cost, small form factor, and versatility.
This ADC core adopts a multi-level, differential pipeline architecture and integrates output error correction logic. It features a wide-bandwidth, differential sample-hold analog input amplifier that supports a variety of user-selectable input ranges. Integrated voltage reference simplifies design. The duty cycle stabilizer can be used to compensate for fluctuations in the ADC clock duty cycle, allowing the converter to maintain excellent performance. The ADC output data format is parallel 1.8 V CMOS or LVDS (DDR).
Flexible power-saving options can significantly reduce power consumption when needed. Setup and control programming is done using a three-wire SPI-compatible serial interface.
The AD9265 is available in a 48-pin LFCSP package and is rated for the −40°C to +85°C industrial temperature range.
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通信
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多模式数字接收机(3G)
GSM、EDGE、WCDMA、LTE、CDMA2000、WiMAX、TD-SCDMA
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智能天线系统
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通用软件无线电
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宽带数据应用
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超声设备