AD9515BCPZ

The AD9515 is a two-output clock assignment IC with low jitter and low phase noise for optimal data converter performance. The device is also suitable for other applications where phase noise and jitter are critical.

It offers two independent clock outputs, one for LVPECL and the other for LVDS or CMOS levels. The LVPECL output operates at 1.6 GHz. The other output operates at 800 MHz in LVDS mode and 250 MHz in CMOS mode.

Each output has a programmable crossover that can be set to integer crossover ratios from 1 to 32. The phase of one clock output relative to the other clock outputs can be set by the crossover phase selection function for timing coarse tuning.

The LVDS/CMOS outputs provide latency characteristics with three selectable full-scale delay values (1.5 ns, 5 ns, and 10 ns), all of which are available with 16 levels of fine tuning.

The AD9515 can be operated or set up without the need for an external controller. The device is programmed with 11 pins (S0 to S10) and 4 logic levels. The programming pin is internally biased to 1/3 VS. The VREF pin provides 2/3 VS level. VS (3.3 V) and GND (0 V) provide two additional logic levels.

The AD9515 is ideal for data converter clock applications and utilizes sub-picosecond jitter encoded signals for optimal converter performance.

The AD9515 is available in a 32-pin LFCSP package and operates from a single 3.3 V supply over a temperature range of −40°C to +85°C.

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