The AD9516-5 provides multiple output clock distribution with subpicosecond jitter and an on-chip phase-locked loop (PLL) for use with external VCOs.
The AD9516-5 has excellent low jitter and phase noise, which greatly improves the performance of data converters and is also suitable for other applications with demanding phase noise and jitter.
The AD9516-5 has six LVPECL outputs in three groups and four LVDS outputs in two groups. Either LVDS output can be reconfigured as two CMOS outputs. The LVPECL output operates at 1.6 GHz, the LVDS output at 800 MHz, and the CMOS output at 250 MHz. Each pair of outputs has a divider with programmable divider ratio and coarse delay (or phase). The LVPECL output is divided over a frequency division range of 1 to 32. The LVDS/CMOS output has a crossover range of up to 1024.
The AD9516-5 is available in a 64-lead LFCSP package and can operate from a single 3.3 V supply with an external VCO, which requires a wider voltage range by connecting the charge pump supply (VCP) to a 5.5 V voltage. The stand-alone LVPECL supply can be from 2.375 V to 3.6 V. The AD9516-5 is specified over the −40°C to +85°C standard industrial temperature range.
It can be used for applications that require integrated EEPROM or require more outputsAD9520-5 and AD9522-5 。
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- Low jitter, low phase noise clock distribution
- 10/40/100 Gb/s network line cards, including SONET, Synchronous Ethernet, OTU2/3/4
- Forward Error Correction (G.710)
- Provides clocks for high-speed ADC, DAC, DDS, DDC, DUC, MxFE
- High-performance wireless transceivers
- Automated Test Equipment (ATE) and high-performance instrumentation