AD9648BCPZ-125

• Product introduction

AD9648BCPZ-125    14位、125 MSPS/105 MSPS、1.8 V双通道Analog-to-digital converters 

The AD9648 is a monolithic, dual, 14-bit, 105/125 MSPS analog-to-digital converter (ADC) that operates from a 1.8 V supply and contains high performance sample-and-hold circuitry and an on-chip reference. It features a multistage differential pipelined architecture with built-in output error correction logic that provides 14-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the entire operating temperature range.

The ADC includes features that provide optimal flexibility and minimal system cost, such as programmable clock and data alignment, and generation of programmable digital test patterns. Available digital test codes include built-in fixed and pseudo-random codes, as well as user-defined test codes input via the serial port interface (SPI).

A differential clock input is used to control all internal conversion cycles. An optional duty cycle stabilizer (DCS) is used to compensate for large clock duty cycle fluctuations while maintaining excellent overall ADC performance.

The digital output data is formatted as offset binary, gray code, or twos complement. Each ADC channel has a data output clock (DCO) to ensure that the receive logic has the correct latch timing. Supports 1.8 V CMOS or LVDS output logic levels. Output data can also be multiplexed into a single output bus.

The AD9648 is available in a 64-lead LFCSP package and is RoHS compliant, specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.

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