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AD9650-65
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AD9650-65

  • 所属类别:转换器
  • 产品名称:14位、170 MSPS/250 MSPS、JESD204B模数转换器
  • 厂商:AD
  • 生产批号:12+
  • 封装:LFCSP-32
  • 库存状态:有库存
  • 库存量:320
  • 最低订购量:1
  • 详细资料:点击查找AD9650-65的pdf资料
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  • Product Introduction

AD9650-65 14-bit, 170 MSPS/250 MSPS, JESD204B analog-to-digital converter

The AD9683 is a 14-bit ADC with a maximum sample rate of 250 MSPS designed to provide a solution for low-cost, small-size, wide-bandwidth, multi-function communication applications.

This ADC core adopts a multi-level, differential pipeline architecture and integrates output error correction logic. The ADC core has a wide bandwidth input and supports a variety of user-selectable input ranges. Integrated voltage reference simplifies design. The duty cycle stabilizer can be used to compensate for fluctuations in the ADC clock duty cycle, allowing the converter to maintain excellent performance. JESD204B high-speed serial interface reduces board routing requirements and reduces the number of pins required for the receiver device.

ADC output data is sent directly to JESD204B serial output channel. These outputs are set to the CML level. Data can be sent over the channel at a maximum sample rate of 250 MSPS for a channel rate of 5 Gbps. The devices provide synchronous inputs (SYNCINB± and SYSREF±).

Flexible power-down options can significantly reduce power consumption when needed. Programmable over-range level detection is supported via a dedicated fast detection pin.

Setup and control programming is done using a three-wire SPI-compatible serial interface.

The AD9683 is available in a 32-pin LFCSP package and is rated for an industrial temperature range of −40°C to +85°C. The product is protected by a U.S. patent.

Product features:

  1. 集成14位、170 MSPS/250 MSPS ADC。
  2. 可配置的JESD204B输出模块支持最高5 Gbps的通道速率。
  3. 片内锁相环(PLL)允许用户提供单个ADC采样时钟,对应JESD204B数据速率时钟由PLL乘以该ADC采样时钟产生。
  4. 支持可选RF时钟输入以简化系统板设计。
  5. 取得专利的差分输入在最高至400 MHz的输入频率下仍保持出色的信噪比(SNR)性能。
  6. 采用1.8 V单电源供电。
  7. 标准串行端口接口(SPI)支持各种产品特性和功能,例如:控制时钟DCS、掉电模式、测试模式、基准电压模式、超量程快速检测以及串行输出配置等。

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  • 通信
  • 分集无线电系统
  • 多模式数字接收机(3G)
    TD-SCDMA、WiMAX、WCDMA、CDMA2000、GSM、EDGE、LTE
  • DOCSIS 3.0 CMTS上游接收路径
  • HFC数字反向路径接收器
  • 智能天线系统
  • 电子测试与测量设备
  • 雷达接收机
  • COMSEC无线电架构
  • IED检测/干扰系统
  • 通用软件无线电
  • 宽带数据应用
  • 超声设备
  • 特点和优势
  •  
  •  

  • JESD204B Subclass 0或Subclass 1编码串行数字输出
    信噪比(SNR):70.6 dBFS(185 MHz AIN,250 MSPS)
    无杂散动态范围(SFDR):88 dBc(185 MHz AIN,250 MSPS)
    总功耗:
    434 mW (250 MSPS)
    1.8 V电源电压
    1至8整数输入时钟分频器
    采样速率最高达250 MSPS
  • 中频采样频率最高达400 MHz
    模数转换器(ADC)内置基准电压源
    灵活的模拟输入范围
    -- 1.4 V p-p至2.0 V p-p
    (标称值1.75 V p-p)
    ADC时钟占空比稳定器(DCS)
    串行端口控制
    节能的掉电模式

Microchip Centennial Electronic Technology (Shenzhen) Co., Ltd

Address: 13H, Block A, Huaqiang Plaza, Huaqiang Road, Futian District, Shenzhen

Phone: 0755-83591082

Fax: 0755-83591083

Q Q:1051085817

 

//www.chip100.com/

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