AD9683is a 14-bit ADC with a maximum sample rate of 250 MSPS designed to provide a solution for low-cost, small-size, wide-bandwidth, versatile communications applications.
The ADC core uses a multistage, differential pipelined architecture with integrated output error correction logic. The ADC core has wide bandwidth inputs that support a variety of user-selectable input ranges. An integrated reference simplifies design. A duty cycle stabilizer can be used to compensate for fluctuations in the ADC clock duty cycle, allowing the converter to maintain excellent performance. The JESD204B high-speed serial interface reduces board routing requirements and reduces the number of pins required for the receiving device.
The ADC output data is fed directly to the JESD204B serial output channel. These outputs are set to CML levels. Data can be sent over the channel at a maximum sample rate of 250 MSPS, resulting in a channel rate of 5 Gbps. The device provides synchronous inputs (SYNCINB± and SYSREF ±).
Flexible power-down options can significantly reduce power consumption when needed. Programmable overrange level detection is supported via a dedicated fast detect pin.
Setup and control programming is accomplished using a 3-wire SPI-compatible serial interface.
AD9683It is available in a 32-pin LFCSP package and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.
Product features
- Integrated 14-bit, 170 MSPS/250 MSPS ADC.
- The configurable JESD204B output module supports lane rates up to 5 Gbps.
- An on-chip phase-locked loop (PLL) allows the user to provide a single ADC sample clock, which corresponds to a JESD204B data rate clock that is generated by multiplying the PLL by the ADC sample clock.
- Supports optional RF clock input to simplify system board design.
- The patented differential inputs maintain excellent signal-to-noise ratio (SNR) performance at input frequencies up to 400 MHz.
- Operates from a single 1.8 V supply.
- The standard serial port interface (SPI) supports a variety of product features and functions, such as control clock DCS, power-down mode, test mode, reference mode, overrange fast detection, and serial output configuration.
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