The AD9684 is a dual-channel, 14-bit, 500 MSPS ADC. The device has built-in on-chip buffers and sample hold circuitry designed for low power consumption, small size, and ease of use. This product is used to sample wide-bandwidth analog signals. The AD9684 is optimized for wide input bandwidth, high sample rate, excellent linearity, and low power consumption in a small package.
This dual-channel ADC core adopts a multi-level, differential pipeline architecture and integrates output error correction logic. Each ADC has a wide bandwidth buffered input that supports a variety of user-selectable input ranges. Integrated voltage reference simplifies design. The data outputs of each ADC are internally connected to an optional 1/2 extraction module.
Both the analog input and clock signals are differential input signals. Each ADC data output is internally connected to two digital downconverters (DDCs). Each DDC contains four cascading signal processing stages: a 12-bit frequency converter (NCO) and three half-band decimal filters that support 2, 4, and 8 divisions.
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通信
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分集多频段、多模数字接收机
3G/4G、TD-SCDMA、WCDMA、MC-GSM、LTE
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通用软件无线电
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超宽带卫星接收机
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仪器仪表（频谱分析仪、网络分析仪、集成式RF测试解决方案）
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雷达
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Digital oscilloscope
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高速数据采集系统
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DOCSIS CMTS上游接收路径
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HFC数字反向路径接收机