The AD9861 is one of the MxFE series of integrated converters® for the communications market. It has a built-in dual-channel 10-bit analog-to-digital converter (ADC) and a dual-channel 10-bit digital-to-analog converter (TxDAC® converter). Available in 50 and 80 speed ratings, the 50 rating is optimized for ADC sampling rates of 50 MSPS and below, and the 80 rating is optimized for ADC sampling rates between 50 MSPS and 80 MSPS. The dual-channel TxDAC converter operates at frequencies up to 200 MHz and has a built-in bypass 2x or 4x interpolation filter. Three auxiliary converters are provided simultaneously to provide the required system-level control voltage or to monitor system signals. All devices are optimized for low power consumption and small form factor, providing cost-effective solutions for the broadband communications market.
The AD9861 uses one input clock pin (CLKIN) to generate all system clocks. ADC and TxDAC converter clocks are generated within a timing generation module that utilizes user-programmable options such as crossover circuitry, PLL multipliers, and switches.
The flexible bidirectional 20-bit I/O bus is suitable for a variety of custom digital back-ends or open-market DSPs. In a half-duplex system, the interface supports 20-bit parallel transmission or 10-bit interleaved transmission. In a full-duplex system, the interface supports a 10-bit ADC bus with staggered transmission and a 10-bit transmit bus with staggered transmission. The flexible I/O bus reduces the number of pins and reduces the package size.
The AD9861 can be configured with an interface bus using the MODE pin or serial programming interface (SPI) to operate the ADC in low-power mode, configure the TxDAC converter interpolation rate, and control ADC shutdown and TxDAC shutdown. SPI provides additional programming options for TxDAC paths (e.g., gain coarse and fine-tuning, offset control for channel matching) and ADC paths (e.g., internal duty cycle stabilizers, binary complement data formats).
The AD9861 is available in a 64-pin LFCSP package (thin, thin-pitch chip-scale package) with a form factor of just 9 mm x 9 mm and a height of less than 0.9 mm, making it suitable for space-intensive applications such as PCMCIA cards.
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宽带接入
宽带局域网(LAN)
通信(调制解调器)