AD9865是一款混合信号前端(MxFE®) IC，适合要求发射和接收路径功能的收发器应用，数据速率最高可达80 MSPS。灵活的数字接口、省电模式和发射-接收高隔离度，使该器件特别适合半双工和全双工应用。该数字接口极为灵活，可与支持半双工或全双工数据传输的数字后端实现简单接口，因此
AD9865经常用来取代分立式ADC和DAC解决方案。省电模式能够降低个别功能模块的功耗，或者在半双工应用中关断未使用的模块。串行端口接口(SPI)允许对许多功能模块进行软件编程。片内PLL时钟乘法器和频率合成器提供所有需要的内部时钟，以及单晶振或时钟源的外部时钟。
The transmit signal path consists of a bypassable 2×/4× low-pass interpolation filter, a 10-bit TxDAC®, and a line driver. The transmit path signal bandwidth can be as high as 34 MHz at an input data rate of 80 MSPS. The TxDAC provides a differential current output that can be directed directly to an external load or to an internal low-distortion current amplifier. The current amplifier (IAMP) can be configured as a current or voltage mode line driver (with two external NPN transistors) capable of delivering more than 23 dBm of peak signal power. The transmit power can be digitally controlled with a range of 19.5 dB and a step of 0.5 dB.
The receive path consists of a programmable amplifier (RxPGA), a tunable low-pass filter (LPF), and a 10-bit ADC. The low-noise RxPGA has a programmable gain range of −12 dB to +48 dB in 1 dB steps; For gain settings above 36 dB, it translates to less than 3.0 nV/√Hz noise to the input. The receiver path LPF cut-off frequency can be set in the range of 15 MHz to 35 MHz or simply bypassed. The 10-bit ADC can achieve excellent dynamic performance in the range of 5 MSPS to 80 MSPS. Both RxPGA and ADC provide adjustable power consumption for power/performance optimization.
The AD9865 can provide a highly integrated solution for many broadband modems. It is available in a space-saving 64-pin chip-level package and is rated for a commercial temperature range of −40°C to +85°C.