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AD9866BCPZRL
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AD9866BCPZRL

  • Category:High-speed / wideband codec and analog front end High-speed logic
  • Product Name:12-bit broadband modem mixed-signal front end (MxFE)®
  • Manufacturers:Analog Devices
  • Production Batch Number:15+
  • Encapsulation:64 ld LFCSP
  • Stock Status:There is stock
  • Stock Quantity:870
  • Minimum order quantity: 1
  • Details:Click here to find pdf documentation for the AD9866BCPZRL
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  • Product introduction

Advantages and features

  • Low cost 3.3 V CMOS MxFETM for broadband modems
  • 12-bit digital-to-analog converter 
    2×/4× interpolation filter 
    200 MSPS DAC update rate
  • Integrated 23 dBm line driver with 19.5 dB gain control range
  • 12-bit, 80 MSPS analog-to-digital converter
  • -12 dB to +48 dB low noise RxPGA (
  • Third-order programmable low-pass filter
  • Flexible digital data path interface 
    - Half-duplex and full-duplex operation
    -Backward compatible with AD9975 and AD9876
  • Multiple shutdown/power-down modes
  • Internal clock multiplier (PLL)
  • Two auxiliary programmable clock outputs
  • Available in 64-pin chip-scale packages or dies

Product details

AD9866is a mixed-signal front-end (MxFE)® IC for those requiring transmit and receive path functionalitytransceiverapplications with data rates up to 80 MSPS. The flexible digital interface, power-down modes, and high transmit-receive isolation make the device ideal for half- and full-duplex applications. The flexibility of this digital interface allows for simple interfacing with digital backends that support half- or full-duplex data transmission, so the AD9866 is often used to replace discrete ADC and DAC solutions. Power-down modes can reduce power consumption for individual function blocks or shut down unused modules in half-duplex applications. The serial port interface (SPI) allows software programming of many functional blocks. The on-chip PLL clock multiplier and synthesizer provide all required internal clocks, as well as external clocks for single crystal oscillators or clock sources.


The transmit signal path consists of a bypassable 2×/4× low-pass interpolation filter, a 12-bit TxDAC,® and line drivers. At an input data rate of 80 MSPS, the transmit path signal bandwidth can be as high as 34 MHz. The TX DAC provides a differential current output that can be directed directly to an external load or to an internal low distortion current amplifier. The current amplifier (IAMP) can be configured as a current or voltage mode line driver (using two external NPN transistors) and is capable of delivering more than 23 dBm of peak signal power. The transmit power can be digitally controlled over a range of 19.5 dB in 0.5 dB steps.


The receive path consists of a programmable amplifier (RxPGA), a tunable low-pass filter (LPF), and a 12-bit ADC. The low-noise RxPGA has a programmable gain range of −12 dB to +48 dB in 1 dB steps; For gain settings above 30 dB, the input-referred noise is less than 3.3 nV/√Hz. The receive path LPF cutoff frequency can be set from 15 MHz to 35 MHz or simply bypassed. The 12-bit ADC achieves excellent dynamic performance from 5 MSPS to 80 MSPS. Both the RxPGA and ADC provide adjustable power consumption for power/performance optimization. The AD9866 provides a highly integrated solution for many broadband modems. It is available in a space-saving 64-pin chip-scale package and is specified over the −40°C to +85°C commercial temperature range.

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  • Powerline networks
  • VDSL and HPNA
  • Wired communication

 

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