ADC083000CIYB

• Single +1.9 V ± 0.1 V operation
• Choice of SDR or DDR output clock
• Serial interface for extended control
• Enter the adjustments and offsets for the full scale range
• Duty cycle corrects the sampling clock
• Test pattern

illustrate

ADC083000 chip is a single, low-power, high-performance CMOS analog-to-digital converter with digitized signals with 8-bit resolution and a sampling rate of up to 3.4 GSPS. With 3 GSPS drawing a typical 1.9 watt from a single 1.9 volt power supply, this device is guaranteed to be code-free over the entire operating temperature range. The unique folding and interpolation architecture, the design of the fully differential comparator, the innovative design of the internal sampling with hold amplifier and the self-calibration plan enable a good response of all dynamic parameters of Nyquist, producing a high 7.0 RMS digit, a 748 MHz input signal and a 3 GHz sample rate (ENOB) while providing 10 -18 Typo rate. ADC083000 chip implements a 3 GSPS sampling rate utilizing the rising and falling edges of a 1.5 GHz input clock. The output format is offset binary code and LVDS digital output, compatible with adjustable common-mode voltage anomalies between 0.8V and 1.15V, in accordance with IEEE 1596.3-1996.

The ADC has a 1:4 demultiplexer that feeds 4 LVDS buses and a Q1 sampling rate reduces the output data rate on each bus.

The converter typically consumes less than 25 milliwatts and operates in an industrial (-40°C) LQFP package with 128 leads, thermally resistant reinforced exposed pads, in a power-down mode and 128-lead ≤ T A ≤ 85°C) temperature range.

Key specifications:

• power consumption

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• Direct RF downconversion
• Digital oscilloscope
• Satellite set-top box
• Communication system
• Test instruments