ADC08D1500CIYB

• Internal sampling and holding
• Single +1.9 V ± 0.1 V operation
• Choice of SDR or DDR output clock
• Interleaved mode is 2x the sample rate
• Multiple ADC synchronization capabilities
• No missing codes are guaranteed
• Serial interface for extended control
• Enter fine-tuning and offset over the full-scale range
• Duty cycle correction sample clock

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The ADC08D1500 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals at 8-bit resolution up to 1.7 GSPS. Consuming a typical 1.8 watt from a single 1.9 volt power supply at 1.5 GSPS, this device is guaranteed to have no missing codes over the entire operating temperature range. The unique folded and interpolated architecture, fully differential comparator design, internal sample-and-hold amplifier and self-calibration program enable an innovative design that responds very flat to all dynamic parameters outside of Nyquist, producing an ENOB 748 MHz input signal with a high 7.25 MHz and a sample rate of 1.5 GHz while delivering 10 -18 The CER output format is binary, with a common-mode voltage anomaly adjustable between 0.8V and 1.2V, and the LVDS digital output is IEEE 1596.3-1996 compliant.

Each converter has a 1:2 multiplexer, feeding two LVDS buses, and the output data rate on each bus is reduced by half the sample rate. The two converters are interleaved and used as a single 3 GSPS ADC.

The typical power consumption of the power-down mode converter is less than 3.5 MW and 128 leads, the heat-resistant enhanced exposed pad LQFP package and operates in industrial (-40°C). ≤ _TA ≤ 85°C) temperature range.

Main specifications

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• Direct RF downconversion
• Digital oscilloscope
• Satellite set-top box
• Communication systems
• Test instruments