ADC11DS105CISQ

• Clock duty cycle stabilizer
• Operates from a single 3.0 or 3.3 V supply
• Serial LVDS output
• Serial control Inteface
• Overrange output
• 60-pin LLP package (9x9x0.8mm, 0.5-pin pitch)

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The ADC11DS105is is a high-performance CMOS analog-to-digital converter with the ability to convert two analog input signals at a rate of up to 105 megasamples per second (MSPS) if converted to 11-bit digital. Serialized digital outputs and differential LVDS signal pairs are provided. These converters feature a differential pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power dissipation and external component count while providing excellent dynamic performance. The ADC11DS105 may operate from a single 3.0 or 3.3 V supply. The power-down feature reduces power consumption at very low levels, while also allowing fast wake-up times to operate fully. The differential input accepts a 2V full-scale differential input swing. A regulated 1.2V internal reference voltage is provided, or the ADC11DS105 can operate with an external 1.2V reference. Selectable duty cycle stability maintains broad performance over a clock duty cycle. A serial interface that allows the ADC11DS105's functions to fully control access to internal registers. The ADC11DS105 is available in a 60-lead LLP package and operates over the industrial temperature range of -40°C to +85°C

Main specifications

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• High IF sampling receiver
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• Portable meter