ADC11DS105CISQ

• Clock duty cycle stabilizer
• Single 3.0 or 3.3 V supply operation
• Serial LVDS output
• Serial control of Inteface
• Over-range output
• 60-Pin LLP Package (9x9x0.8mm, 0.5-pin pitch)

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The ADC11DS105is a high-performance CMOS analog-to-digital converter capable of up to 105 megabytes per second (MSPS) when converted to 11-bit digits. Serialized digital outputs and differential LVDS signal pairs are provided. These converters feature a differential pipeline architecture with digital error correction and an on-chip sampling and hold circuitry to minimize power consumption and the number of external components while providing excellent dynamic performance. ADC11DS105 may operate from a single 3.0 or 3.3 V supply. The power-down feature reduces power consumption to a very low level while also allowing fast wake-up times to operate in full operation. The differential input accepts a 2V full-scale differential input swing. Provides a stable 1.2V internal reference voltage, or ADC11DS105 can operate with an external 1.2V reference. Selectable duty cycles are stable and maintain a wide range of duty cycles in one clock. A serial interface that allows ADC11DS105 functions to fully control access to internal registers. ADC11DS105 is in a 60-pin LLP package and operates over an industrial temperature range of -40°C to +85°C

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• High IF sampling receiver
• Wireless base station receiver
• Test & Measurement Equipment
• Communication instruments
• Portable instrumentation