ADC12DC080CISQE

• In-house sampling and holding circuitry and precision references
• Low power consumption
• Clock duty cycle stabilizer
• Powered from a single 3.0 V supply
• Power-down mode
• offset binary or 2 complement output data format
• 60-Pin LLP Package (9x9x0.8mm, 0.5-pin pitch)

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ADC12DC080 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digits at speeds up to 80 megabytes per second (MSPS). These converters feature a differential pipeline architecture with digital error correction and an on-chip sampling and hold circuitry to minimize power consumption and the number of external components while providing excellent dynamic performance. A unique sampling and holding stage with a yield of 1 GHz of full power bandwidth. ADC12DC080 may operate from a single +3.0 V supply supply. The power-down feature reduces power consumption to a very low level while also allowing fast wake-up times to operate in full operation. The differential input provides a 2V full-scale differential input swing. Provides a stable 1.2V internal reference voltage, or ADC12DC080 can operate with an external 1.2V reference. Pin selectable output data format (offset with complement binary of 2) and duty cycle stability. The duty cycle is stable and maintains the performance of a wide range of duty cycles at one clock.

ADC12DC080 is in a 60-pin LLP package and operates over an industrial temperature range of -40°C to +85°C

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• High IF sampling receiver
• Wireless base station receiver
• Test & Measurement Equipment
• Communication instruments
• Portable instrumentation