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ADCLK950BCPZ

Category:Clock chip
Product Name:Two selectable inputs, 10 LVPECL outputs, SiGe clock fanout buffer
Manufacturers:AD
Production Batch Number:15+
Encapsulation:40ld LFCSP
Stock Status:There is stock
Stock Quantity:2330
Minimum order quantity: 1
Details:

Product introduction

Advantages and features

2 selectable differential inputs
Operating frequency: 4.8 GHz

Wideband random jitter: 75 fs rms
On-chip input termination
Power supply: 3.3 V

Product details

ADCLK950is an ultrafast clock fanout buffer fabricated using Analog Devices' proprietary XFCB3 silicon-germanium (SiGe) bipolar process designed for high speed applications requiring low jitter.

The device has two differential inputs, selectable through IN_SEL control pins. Both inputs are equipped with center-tap, differential, 100 Ω on-chip termination resistors and accept DC-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and AC-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFx pin is provided to bias the AC-coupled input.

ADCLK950Built-in 10 full-swing emitter-coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, VCC is biased to the positive supply and VEE is biased to ground. For ECL operation, VCC is biased to ground and VEE is biased to negative supply.

The output stage is designed to drive 800 mW directly from each end to a 50 Ω load terminated at VCC− 2 V, resulting in a total differential output swing of 1.6 V.

The ADCLK950 is available in a 40-lead LFCSP package and is specified over the standard industrial temperature range of −40°C to +85°C.

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Low jitter clock distribution

Clock and data signal recovery

Level shifting

Wireless communication

Wired communication

Medical and industrial imaging

Automated Test Equipment (ATE) and high-performance instrumentation

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