ADG3123BRUZ

The internal structure of the device ensures compatibility with logic circuits powered from a 2.3 V to 5.5 V supply. The voltage applied to the VDDA, VDDB, and VSS pins allows the logic level available to the Y-side output of the device to be set. The VDDA and VDDB pins set high output levels for Y1 to Y6 and Y7 to Y8, respectively. The VSS pin sets the low output level for all channels. For low input levels, the ADG3123 is capable of providing output voltage levels as low as −24.2 V; For high input logic levels, it can provide output levels up to +35 V. To ensure proper operation, the VDDB must always be greater than or equal to the VDDA and the voltage between the VSS and the VSS pins should not exceed 35 volts.

These channels have a low output impedance, so they guarantee short rise and fall times, even under large capacitive loads. This feature, along with its low propagation latency and low power consumption, makes ADG3123 an ideal driver for TFT-LCD panel applications.

The ADG3123 is rated for a temperature range of −40°C to +85°C and is available in a compact 20-pin TSSOP lead-free package.

Product features:

1. 兼容宽范围CMOS逻辑电平
2. 高输出电压电平
3. 具有快速的上升和下降时间以及低传播延迟
4. 超低功耗
5. 紧凑的20引脚TSSOP封装，符合RoHS要求

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