ADL5391Drawing on three decades of experience with advanced analog multiplier technology from Analog Devices, the following general mathematical function has proven to be versatile in function synthesis: V
W= α × (V
Xx V
Y)/1 V + V
Z
ADL5391The most significant improvement is the adoption of a new multiplier core architecture that is significantly different from the traditional architecture used since 1970. Traditional architectures use a current-mode, translinear core that is not symmetrical with respect to the X and Y inputs, resulting in misalignment of amplitude and timing, which can be problematic at high frequencies. The new multiplier core provides symmetrical signal paths for the X and Y inputs, eliminating these misalignments. The Z input allows the signal to be added directly to the output, eliminating the need for a carrier or applying a quiescent offset voltage.
The ADL5391 is manufactured using Analog Devices' proprietary high performance 65 GHz SOI complementary SiGe bipolar IC process and is available in a 16-lead lead-free LFCSP package with an operating temperature range of -40°C to +85°C and an evaluation board.