ADP7102是一款CMOS、
Low dropout linear regulator,采用3.3 V至20 V电源供电,最大输出电流为300 mA。这款高输入电压LDO适用于调节19 V至1.22 V供电的高性能模拟和混合信号电路。该器件采用先进的专有架构,提供高电源抑制、低噪声特性,仅需一个1 μF小型陶瓷输出电容,便可实现出色的线路与负载瞬态响应性能。
ADP7102 offers seven fixed output voltage options and an adjustable output model that can be regulated from 1.22 V to VIN − VDO via an external feedback divider.
The ADP7102 output noise voltage is 15 μV rms and is not affected by the output voltage. These devices have a "power good" digital output pin that allows the power system monitor to check if the output voltage is normal. The user-programmable precision undervoltage latching feature allows for easy control of the timing of multiple power supplies.
ADP7102 available in 8-pin 3 mm × 3 mm LFCSP and 8-pin SOIC packages. LFCSP provides an ultra-compact solution with excellent thermal performance to meet the needs of applications with up to 300 mA output current in a small and low-profile board space.
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适应噪声敏感应用:
ADC, DAC ADC、DAC电路、精密放大器、高频振荡器、时钟和PLL
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通信和基础设施
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医疗和保健
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工业与仪器仪表