| Model |
Manufacturers |
lot number |
encapsulation |
illustrate |
| CD4076B |
TI |
10+ |
SOP |
CMOS 4-bit Class D registers with clock and three-state outputs |
| CD4044B-MIL |
TI |
10+ |
SOP |
CMOS quad with three-state outputs and non-R/S latches |
| CD4044B |
TI |
10+ |
SOP |
CMOS quad with three-state outputs and non-R/S latches |
| CD4043B-MIL |
TI |
10+ |
SOP |
CMOS quad or non-R/S latches with three-state outputs |
| CD4043B |
TI |
10+ |
SOP |
CMOS quad or non-R/S latches with three-state outputs |
| CD4042B-MIL |
TI |
10+ |
SOP |
CMOS quad clock "D" latch |
| CD4042B |
TI |
10+ |
SOP |
CMOS quad clock "D" latch |
| SN74S112A |
TI |
10+ |
SOP |
Dual J-K drop-edge flip-flops with zero and preset functions |
| SN74LVC112A |
TI |
10+ |
SOP |
Dual drop-edge J-K triggers with zeroing and preset functions |
| SN74LS73A |
TI |
10+ |
SOP |
Dual J-K triggers with zeroing function |
| SN74LS112A |
TI |
10+ |
SOP |
Dual J-K drop-edge flip-flops with zero and preset functions |
| SN74LS109A |
TI |
10+ |
SOP |
Dual J-K rising edge flip-flops with zero and preset functions |
| SN74LS107A |
TI |
10+ |
SOP |
Dual J-K triggers with zeroing function |
| SN74HC112 |
TI |
10+ |
SOP |
Dual J-K drop-edge flip-flops with zero and preset functions |
| SN74HC109 |
TI |
10+ |
SOP |
Dual J-K rising edge flip-flops with zero and preset functions |
| SN74F112 |
TI |
10+ |
SOP |
Dual J-K drop-edge flip-flops with zero and preset functions |
| SN74F109 |
TI |
10+ |
SOP |
Dual J-K rising edge flip-flops with zero and preset functions |
| SN74AS109A |
TI |
10+ |
SOP |
Dual J-K rising edge flip-flops with zero and preset functions |
| SN74ALS112A |
TI |
10+ |
SOP |
Dual J-K drop-edge flip-flops with zero and preset functions |
| SN74ALS109A |
TI |
10+ |
SOP |
Dual J-K rising edge flip-flops with zero and preset functions |