- IEEE 802.3, version 2.2 PCI MAC/BIU supports data transfer rates of 10 Mb/s Ethernet and traditional 100 Mb/s Fast Ethernet (via internal physical)
- Bus master - burst size up to 128 segment alignment (512 bytes)
- 97 BIU complies with PC and PC 98 Hardware Design Guide, Draft PC 99 Hardware Design Guide, supports ACPI 1.0, PCI Power Management Specification Version 1.1, OnNow Device Class Power Management Reference Specification - Network Device Class Version 1.0a
- Wake on LAN (WOL) supports the PC98 standard, PC99, SecureOn, and OnNow, including directed packets, magic packets, VLAN packets, ARP packets, pattern-matched packets, and PHY status changes
- A PCI design guide for Clkrun mobile functionality
- Virtual Local Area Network (VLAN) and long frame support
- Supports IEEE 802.3x full-duplex flow control
- Extremely flexible Rx packet filtering, including: perfect matching with single address highest bitmask, broadcast, multicast entry 512/unicast hash table, deep packet filtering mode up to 4 unique patterns
- The statistics aggregate RFC 1398 (Ether-like MIB) from RFC 1213 (MIB II), which complies with IEEE 802.3 London Metal Exchange support and reduces CPU overhead management
- Internal 2 KB of send and receive data for FIFO 2 KB
- Serial EEPROM with auto-configuration port loads data from EEPROM power-up
- The flash/PROM interface supports remote boot
- Fully integrated IEEE 802.3/802.3u 3.3 physical layer CMOS
- IEEE 802.3 compliant 10BASE-T transceivers have integrated filters
- IEEE 802.3u 100BASE-TX compliant transceivers
- Fully integrated physical sublayer of the ANSI X3.263 standard for TP-PMD with adaptive equalization and baseline drift compensation
- IEEE 802.3u auto-negotiation compliant - advertising feature configured via EEPROM
- Full duplex supports data transfer rates of 10 and 100 Mb/s
- Single 25 MHz reference clock
- 144-pin LQFP and 160-pin LBGA packages
- The low-power 3.3V CMOS design and operation is 561 mW, 380 mW in wake-on-LAN mode, and 33 mW typical power sleep mode
- The IEEE 802.3u-compliant MII replaces the external physical layer device
illustrate
The DP83816 is a single-chip 10/100 Mb/s PCI bus Ethernet controller. This is aimed at low-cost, high-capacity PC motherboards, adapter cards, and embedded systems. The DP83816 fully implements version 2.2 33 power management PCI bus interface that supports host communication MHz. Packet descriptors and data transfers are controlled via the bus, reducing the burden on the host CPU. The DP83816 can support a minimum interframe gap between transmission and reception of full duplex 10/100 Mb/s.
The DP83816 device is an enhanced version of National Semiconductor's PCI MAC/BIU (Media Access Controller/Bus Interface Unit) integrated and 3.3V CMOS physical layer interface.
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