DS1961S 1024-bit EEPROM
Key features
- The 1128-bit 5V EEPROM memory is divided into four pages, 256-bit, 64-bit write-only keys and up to five general-purpose read/write registers
- Write access requires knowing the secrets and computing power to transmit the authorized 160-bit MAC
- Secret and data memory write protection (all or 0) or EPROM emulation mode ("write 0", p. 1)
- The on-chip 512-bit SHA-1 engine calculates the 160-bit MAC and generates the secret
- Read and write a wide 2.8V voltage range from -40°C to 5.25V to +85°C
- Communication with a single digital signal, hosted at 14.1kb per second using the 1-Wire protocol
- On-chip 16-bit CRC generator to ensure data transmission
- High-speed mode increases communication speed to 125kbps
- The operating temperature range is from -40°C to +85°C
- Minimum 10 years of data are stored at 85 °C
generalI button function
- Unique, factory lithography and tested 64-bit registration numbers (8-bit family code + 48-bit serial number + 8-bit CRC checksum) guarantee absolute traceability because no two devices are the same
- Multipoint controller for 1-Wire networks
- Digital identification and instantaneous access to information
- Chip-based data carriers store information tightly
- Data can be accessed while stamping opposed
- Button shape with cup probe, self-adjusting
- The durable stainless steel case is engraved with a registration number to withstand harsh environments
- Easily attach self-adhesive backing with its flange latch, or lock with a ring on the edge of the pressed edge
- When the detection response is detected, the reader is applied to the voltage for the first time
description
The DS1961S combines a robust 1024-bit EEPROM, 64-bit key, an 8-byte register/control page for up to five user read/write bytes, a 512-bit SHA-1 engine, and a full-featured 1-Wire® interfaceIbutton ®. With the 1-Wire protocol, only one data line and one ground loop are required to transmit data serially. An additional memory area of the DS1961S called scratchpad acts as a buffer, register page, or when a new secret is installed when writing to main memory. The data is first written to the scratchpad, from where it can be read back. After the data has been verified, the copy scratchpad command transfers the data to the final storage location, as specified by the DS1961S, and receives a matching 160-bit Message Authentication Code (MAC). MAC computing involves secret and additional data stored on the DS1961S, including device identity registration. Loadable without providing MAC only a new secret. The SHA-1 engine can also activate the MAC to compute 160 bits when reading a storage page or computing a new secret instead of loading.
The DS1961S understands a unique command "refresh staging." ” Proper use of the refresh order after copying the scratchpad operation (see the Write Verification section) reduces weak bit failures in touch environments. The refresh sequence also provides a means to restore the functionality of a weakly state bit device.
Each DS1961S has its own 64-bit ROM registration number, which is guaranteed absolute traceability by a factory lithography chip providing a unique identity. Robust stainless steel package with high resistance to environmental hazards such as dust, moisture and impact. Its compact coin-operated silhouette mates with a socket that makes the DS1961S easily accessible using a human operation. Accessories enable the DS1961S to be mounted on almost any surface, including plastic keychains and photo ID badges.