DS91D176TMA

• DC to 100+ MHz/200+ Mbps with low power, low EMI operation
• Optimal ATCA, uTCA clock distribution network
• Meets or exceeds TIA/EIA-899 M - LVDS standards
• To improve noise wide input common-mode voltage immunity
• DS91D176 is a Type 1 receiver input
• DS91C176 type and 2 receiver fail-safe
• Industrial temperature range
• Space-saving in SOIC-8 package

illustrate

DS91C176 is the application of 100 MHz and DS91D176 single-channel M-LVDS (Multipoint Low Voltage Differential Signal) using transceivers designed for multipoint networks such as ATCA and uTCA-based system clock distribution. M-LVDS is a new bus interface standard (TIA/EIA-899) optimized for multipoint networks. Edge rate control, tight input receiver thresholds and intensity increase lane roots, making M-LVDS devices ideal for distributing network signals through multi-point critical enhancments.

The DS91C176/DS91D176 is a half-duplex transceiver that receives the LVTTL/LVCMOS input signal and converts it into a differential M-LVDS signal. The receiver inputs low-voltage differential signals to receive transmissions (LVDS, LVDS type B, M-LVDS, LOW-VOLTAGE, PECL, and CML) and convert them to 3V LVCMOS signals. The DS91D176 has an offset-free M-LVDS receiver input type 1. The M-LVDS receiver has in DS91C176 to enable Type 2 fault protection function.