- 25-80 MHz 16:1/1:16 serializer/deserializer (2.56Gbps full-duplex throughput)
- Independent clock independent transmitter and receiver operation, enabled, and turned off the power pins
- Hot-swap protection (high-impedance power-up) and synchronization (receiver lock for random data)
- Reference clock width of +/- 5% to facilitate system design using locally generated clock frequency tolerances
- line and local loopback modes
- Low electromagnetic interference (EMI) for serial transmission between the Lebax BLVDS backplane and the cable
- No external coding required
- Internal PLL, no external PLL element required
- +3.3 V single power supply
- Low power consumption: 104 mA (typical) transmitter, 119 mA at 80MHz (typical) receiver
- ± receiver input threshold of 100mV
- Lock detection and reporting of pin losses
- Industrial -40 to +85°C temperature range
- > HBM ESD at 2.5kV
- Compact, standard 80-pin PQFP package
illustrate
Transparent DS92LV16 serializer/deserializer (SERDES) converts the embedded clock information of a BLVDS serial stream into a 16-bit parallel bus. This single serial data stream simplifies the transmission of PCB traces and cables by eliminating bias issues between parallel data and clock paths, 16-bit or less buses. It saves system costs and narrows the data path, which reduces the size and pins of PCB layers, cable widths, and connectors.
This SERDES has the ability to test systems and devices including built-in. The Line Loopback and Local Loopback features provide the following features: Local Loopback, which enables the user to check the integrity of the transceiver from the local parallel bus side, can check the integrity of the system's data transmission lines to loop the line.
The DS92LV16's high-speed I/O signal adopts BLVDS Reliable data transmission over the BLVDS serial transmission path provides a low-power and low-noise environment. Currents of equal magnitude and opposite directions control the edge field generated by EMI coupling via a differential data path.
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