- 15-66 MHz 18:1/1:18 serializer/deserializer (2.376 Gbps full-duplex throughput)
- Independent clock independent transmitter and receiver operation, enable, and down pin power
- Hot-swap protection (high impedance power-up) and synchronization (receiver lock for random data)
- A 5% wide reference clock ± allows system designs to use locally generated clock frequency tolerances
- Line and local loopback modes
- Low electromagnetic interference (EMI) for serial transmission between the BLVDS backplane and the cable
- No external coding is required
- Internal PLL, no external PLL components required
- Single +3.3 V supply
- Low power consumption: 90 mA (typical) transmitter, 100mA 66 MHz PRBS - 15 mode (typical)
- ± 100 mV receiver input threshold
- Lock detection and reporting pin losses
- Industrial - 40 to +85 ° C temperature range
- > 2.0KV HBM ESD
- Compact, standard 80-pin LQFP package
illustrate
DS92LV18 serial/deserializer (SERDES) pair transparently converts to an 18-bit parallel bus with embedded clock information BLVDS serial data stream. This single serial data stream simplifies the transmission of 18-bit, even less PCB traces and cables by eliminating the problem of deviation between parallel data and clock paths to bus. It saves system cost and shrinks the data path, which reduces the PCB layers, cable width, and connector size and pins.
This SERDES pair includes built-in testing capabilities for systems and devices. The line loopback feature enables the user to check the integrity of the transmitter and receiver's serial data transmission paths while deserializing the parallel data output by the serial data receiver. Local loopback capability that enables the user to check the integrity of the transceiver from the local parallel bus side.
The DS92LV18 uses modified BLVDS high-speed I/O signals The reliable transmission of data over the BLVDS serial transmission path provides a low-power and low-noise environment. Current currents of equal magnitude and opposite directions control the edge field generated by EMI coupling through a differential data path.
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