KMSC8126TVT6400 Quad-core 16-bit DSP with Ethernet, TCOP and VCOP
MSC8126 is a single-chip highly integrated system that combines four StarCore SC140 expansion cores with RS-232 serial interfaces, four time-division multiplexing (TDM) serial interfaces, 32 universal timers, a flexible system interface unit (SIU), an Ethernet interface, a Turbo coprocessor (TCOP), a Viterbi coprocessor (VCOP), and a multi-channel DMA controller. Four expanded cores that deliver up to 8000 DSP MMACS performance up to 500 MHz. Each core has 4 arithmetic logic units (ALUs), internal memory, a write buffer, and two interrupt controllers. MSC8126 optimized for applications targeting high-bandwidth compute DSPs and wireless transcoding and packet phones and high-bandwidth base station applications. MSC8126 provides enhanced performance while maintaining low power consumption, significantly reducing the cost of the system. MSC8126 device design provides an optimal solution, 3G wireless base station, to help eliminate many expensive and power-hungry ASICs and FPGAs that require both symbol rate and chip rate assistance in today's systems. In addition, MSC8126 devices allow customers to increase the capabilities of the next generation to effectively utilize the higher frequencies and bitrates available in 3G systems. Efficient application software development is key to Freescale's strategy to accelerate our customers' time to market. Developers can take advantage of development tools and real-time operating systems (RTOS) provided by Freescale and third-party vendors. In addition, Freescale is working with third-party vendors to provide integrated system solutions, including voice encoders, hybrid echo cancellation, fax, modems, and xDSL software for GSM, CDMA, TDMA, and ITU G.7XX
Features -------------------------------------------------- ------------------------------ four 400/500 MHz StarCore SC140 DSP cores expand to 16 ALUs to deliver up to 6400/8000 MMACS performance on a single chip, equivalent to a 1.6/2.0 The GHz SC140 core is the industry's largest on-chip SRAM memory, 1436 KB of internal SRAM, efficient multi-level memory hierarchy, and external bus configuration is: 32-bit data system bus/64-bit direct slave interface (DSI). 64-bit data system bus/32-bit DSI. Ethernet (MII/RMII) / 32-bit system bus/32-bit DSI. Four independent time-division multiplexing (TDM) interfaces with 256 channels of connection to T1/E1, MVIP, and H.110 interfaces up to 62.5 Mbps per TDM interface Flexible memory controller access to a wide range of external memory, including SDRAM chips, SRAM comparisons, SSRAMs, EPROM, and Flash internal DMA controllers, support for 16-minute multiplexing unidirectional channels, enabling data transfer and SC140 core M1 memory, M2 memory, and serial interfaces Ethernet interface design complies with IEEE® standards 802.3TM, 802.3uTM, 802.3xTM and 802.3acTM: direct access to internal memory via DMA controller Support 10/100 Mbps and 10 Mbps Media Standalone Interface (MIIS), 10/100 Mbps Reduced Media Independent Interface (RMII) and 10/100 Mbps Serial Media Independent Interface (SMII)
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