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LMH0056SQ
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LMH0056SQ

  • Category:Fast recovery diode
  • Product Name:The SD SDI clock restorer has a 4:1 input multiplexer
  • Manufacturers:NSC
  • Production Batch Number:10+
  • Encapsulation:LLP
  • Stock Status:There is stock
  • Stock Quantity:10000
  • Minimum order quantity: 1
  • Details:Click here to find the LMH0056SQ pdf material
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  • Product introduction

peculiarity

  • Supports SMPTE 259M(C) serial digital video standard
  • Supports serial data rate operation of 270 Mbps
  • Supports DVB - ASI at 270 Mbps
  • Operates from a single 3.3V supply
  • Typical power consumption of 360 mW
  • Integrated 4:1 multiplexed inputs
  • Two differences, output clock recovery
  • Choose a second clock recovery output or a low jitter, differential, data rate clock output
  • Single 27 MHz external crystal or reference clock input
  • Lock the detection output metric
  • Output data and clock for mute function
  • Automatic/manual clock restorer bypass
  • Differential LVPECL is compatible with serial data inputs and outputs
  • LVCMOS controls input and output metrics
  • 48-pin LLP package
  • Industrial temperature range: -40 °C to +85 °C
  • Footprint is compatible with LMH0056 and LMH0356

illustrate

The LMH0036 clock restorer and SDI SDI 4:1 input multiplexed retimes serial digital video data comply with the SMPTE 259M(C) standard. The LMH0036 operates at a serial data rate of 270 Mbps while also supporting DVB-ASI operation at 270 Mbps. The LMH0036 includes a comprehensive 4:1 input multiplexer with four input streams in one selectable retiming.

And LMH0036 retimes incoming data to suppress accumulated jitter. The recovered LMH0036 serial data rate clock and selectively provided as output. While the LMH0036 has two differential outputs for serial data, the second output can be selected as a low jitter, data rate clock output. The controls and specifications are: serial clock or second serial data output selection, manual rate selection input, output SD specification, lock detection output, auto/manual bypass data and output mute. Differential LVPECL compatible with serial data input, output and serial data rate clock output. The CML's serial data and serial data rate clock outputs drive a 100Ω differential termination network use. Control logic input and output LVCMOS compatible.

The LMH0036 uses a single 3.3V power supply. Typical power consumption is 360 milliwatts. The device is available in a 48-pin LLP package.


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  • The SDTV serial digital video interface is:
  • Digital video routers and switches
  • Digital video processing and editing equipment
  • DVB - ASI device
  • Video standard and format converter

andLMH0056SQRelated ICs are:


Model Manufacturers lot number encapsulation illustrate
LMH0056SQ NSC 10+ LLP The SD SDI clock restorer has a 4:1 input multiplexer

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