LMH0340SQ

• LVDS interface to host FPGA
• No external VCO or reference clock requirements are required
• Integrated variable output cable driver
• 3.3 SMBus configuration interface
• Integrated TXCLK PLL clock noise removal
• SMALL 48PIN LLP PACKAGE
• Industrial temperature range: -40 °C to 85 °C

illustrate

The LMH0340/0040/0070/0050 SDI serial is part of National Semiconductor's FPGA-Connect SER/DES 5-bit LVDS interface product family with FPGAs. An FPGA host will format the supplied IP so that the output of the LMH0340 is compatible with the requirements of the DVB-ASI, SMPTE 259M-C, SMPTE 292M and SMPTE 424M standards. see For details, while standard is supported per device.

The interface between SER (serial) and FPGA consists of a 5-bit wide LVDS data bus, an LVDS clock and an SMBus interface. The LMH0340/0040/0070 SER devices include an integrated cable driver, which is fully compliant with the SMPTE specifications listed above. The LMH0050 has a CML output driver that can drive differential transmission line or interface cable drivers.

The FPGA's connectivity to the SER/DES family supports IP protocols, allowing design engineers to quickly develop SER/DES products for use in video applications. The SER is packaged in a small 48-pin LLP package.

Main specifications

• Output compatible with SMPTE 424M, SMPTE 292M, SMPTE 259M-C and DVB-ASI (see Table 1)
• Typical power consumption: 440 mW
• 30 ps typical output jitter (HD, 3G)

apply

• The SDI interfaces are:
• camera
• vcr
• Video switcher
• Video editing system