LMH6552MA

• Either configure a 3.6 GSPS interleaved or 1.8 GSPS dual ADC
• Pin compatible with the ADC10D1000/1500 and ADC12D1000/1600
• Internally terminated, buffered, differential analog inputs
• Staggered timing automatic and manual tilt adjustment
• Test mode in system debug output
• Programmable 15-bit gain and 12-bit plus sign offset
• Programmable tons_ADAdjustment function
• 1:1 non-demuxed or 1:2 LVDS output demuxed
• Multi-chip system with automatic synchronization function
• Single supply 1.9V ± 0.1V

illustrate

The 12-bit, 3.6 GSPS ADC12D1800 is the latest advancement in National Semiconductor's ultrafast ADC family and calls for the features, architecture, and foundation of the 10-bit GHz family functionality ADC 。

The ADC12D1800 provides a flexible LVDS interface with multiple SPI programmable options to facilitate board design and FPGA/ASIC data acquisition. LVDS outputs are IEEE 1596.3-1996 compliant and support programmable common-mode voltages.

The product is packaged in a lead or lead-free 292-ball thermally enhanced BGA package that exceeds the rated industrial temperature range -40 ° C to +85°C.

In order to achieve full rated FCLK> 1.6GHz performance, it is necessary to write the maximum power setting once registered via serial interface 6H, see Get more information.

Main specifications

Interleaved 3.6 GSPS ADC

Dual 1.8 GSPS ADCs, fin = 125MHz

apply

• Broadband communications
• Data acquisition system
• Radar/LiDAR
• Stb
• Consumer RF
• Software Defined Radio