LMH6552MA

• Either configure a 3.6 GSPS interleaved or 1.8 GSPS dual-channel ADC
• Pin compatible with ADC10D1000/1500 and ADC12D1000/1600
• Internally terminated, buffered, differential analog inputs
• Staggered timing automatic and manual tilt adjustment
• Debug the output test mode in the system
• Programmable 15-bit gain and 12-bit plus-sign offset
• Programmable ton AD adjustment function
• 1:1 non-demuxed or 1:2 LVDS output demuxed
• Multi-chip system with automatic synchronization function
• Single supply 1.9V ± 0.1V

illustrate

The 12-bit, 3.6 GSPS ADC12D1800 is the latest advancement in National Semiconductor's ultra-high-speed ADC series and calls for the characteristics, architecture and foundation of 10-bit GHz home functionality ADC 。

ADC12D1800 provides a flexible LVDS interface with multiple SPI programmable options to facilitate board design and FPGA/ASIC data acquisition. The LVDS output is compliant with IEEE 1596.3-1996 and supports programmable common-mode voltages.

It is packaged in a lead or lead-free 292-ball thermally enhanced BGA package that exceeds the rated industrial temperature range -40 ° C to +85 ° C.

In order to achieve the performance of the fully rated FCLK> 1.6GHz, it is necessary to write the maximum power setting registered once through the serial interface 6H, see Get more information.

Key specifications:

Interleaved 3.6 GSPS ADC

Dual 1.8 GSPS ADC with wings = 125MHz

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• Broadband communication
• Data acquisition system
• Radar/LiDAR
• Stb
• Consumer RF
• Software Defined Radio