LMH6552MAX

• Configure either 2.0/3.2 GSPS interleaved or 1.0/1.6 GSPS dual ADCs
• Pin compatible with the ADC10D1x00 and ADC12D1x00
• Internally terminated, buffered, differential analog inputs
• Staggered timing automatic and manual tilt adjustment
• Test mode in system debug output
• Programmable 15-bit gain and 12-bit plus sign offset
• Programmable tons_ADAdjustment function
• 1:1 non-demuxed or 1:2 LVDS output demuxed
• Multi-chip system with automatic synchronization function
• Single supply 1.9V ± 0.1V

illustrate

The 12-bit, 2.0/3.2 GSPS ADC12D1000/1600 is the latest advancement in National Semiconductor's ultrafast ADC family and calls for the features, architecture, and foundation of the 10-bit GHz family functionality ADC 。

The ADC12D1000/1600 provide a flexible LVDS interface with multiple SPI programmable options to facilitate board design and FPGA/ASIC data acquisition. LVDS outputs are IEEE 1596.3-1996 compliant and support programmable common-mode voltages.

The ADC12D1000/1600 package is available in a lead or lead-free 292-spherical thermally enhanced BGA package that exceeds the specified industrial temperature range -40 ° C to +85°C.

Main specifications

Interleaved 2.0/3.2 GSPS ADC

Dual 1.0/1.6 GSPS ADCs, fins = 125 MHz

apply

• Broadband communications
• Data acquisition system
• Radar/LiDAR
• Stb
• Consumer RF
• Software Defined Radio