LP2998MRE

• Supply and intake current
• Low output voltage offset
• No external resistance is required
• Linear topology
• Functions of Suspension to Memory (STR).
• Low number of external components
• Thermal shutdown
• In SO-8, it is available in a PSOP-8 package

illustrate

The LP2998 linear regulator is designed to meet the JEDEC SSTL-2 and JEDEC SSTL-18 specifications for terminated DDR1-SDRAM and DDR-II memory. The device contains a high-speed op-amp to provide superior load transient response. The output stage prevents through-through while providing DDR1-SDRAM termination requirements of 1.5A continuous current and DDR-II termination requirements of 0.5A continuous current. The LP2998 also features a V SENSE pin that provides superior load regulation and a V REF output as a chipset and DIMM reference.

An additional feature of the LP2998 is found to be a positive low shutdown (^SD) pin that provides a pend-to-memory (STR) function. ^ When SD is pulled down, the V TT output will provide a high impedance output tristate, while V REF is still active. Power saving advantage in this mode through lower quiescent current.

apply

• DDR-II and DDR-III termination voltages for DDR-I
• SSTL-18 terminated
• SSTL-2 and SSTL-3 terminated
• HSTL terminated