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LTC1278-4ISW
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LTC1278-4ISW

  • Category:DC-DC-Controller
  • Product Name:4 - 12 bits, 500KSPS sampling A/D conversion with shutdown
  • Manufacturers:LINEAR
  • Production Batch Number:09+
  • Encapsulation:SOP
  • Stock Status:There is stock
  • Stock Quantity:5000
  • Minimum order quantity: 0
  • Details:Click here to find PDF information on the LTC1278-4ISW
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  • Product introduction

LTC1278-4ISW

4 - 12 bits, 500KSPS sampling A/D conversion with shutdown

peculiarity

 

  • Single 5V supply or ± 5V operation
  • Two Speed Stages, 500KSPS (LTC1278 - 5)
    400ksps(LTC1278 - 4)
  • 70 dB S/(N+D) and 74 dB THD in Nyquist
  • No missing codes over temperature
  • 75mW power (typical) power consumption
  • Instantaneous wake-up power off
  • The internal reference can be overloaded from the outside
  • Internal synchronous clock; clock
  • High impedance analog input
  • 0V to 5V or ± 2.5V input range
  • New flexible, friendly parallel interface, DSP and FIFO
  • 24-pin SOL package

description

The LTC™1278 is a 1.6μs, 500KSPS, sampled 12-bit A/D conversion that consumes only 75mW from a single 5V or ± 5V supply. This easy-to-use device completes a 200-nanosecond sample-and-hold, a precise reference and internally fine-tuned clock. Unipolar and bipolar conversion modes add flexibility to the ADC. Low power consumption is made more attractive by the 8.5mW power-saving feature. Instant wake-up from shutdown allows the converter to even power down during brief periods of inactivity. The LTC1278 converts to a 0V to 5V unipolar input from a single 5V supply and ± 5V supply ± a 2.5V bipolar input. Maximum DC specifications include ± 1LSB INL and ± 1LSB DNL. Outstanding guaranteed AC performance, including 70 dB S/(N+D) and 78 dB total harmonic distortion over an operating temperature range of 70 dB input frequency. The internal clock is trimmed with a conversion time of 1.6μs. The clock is automatically synchronized to each sample command, eliminating the problem of asynchronous clock noise in competitive devices. A separate conversion start input and data preparation signal (BUSY) for easy connection of FIFOs, DSPs and microprocessors.

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