LTM9002-LA

• Product Introduction

LTM9002-LA 14-bit, dual-channel IF/baseband receiver subsystem

peculiarity

• 集成双通道、14 位、高速 ADC、无源滤波器和固定增益差分放大器
• 高达 300MHz IF 范围
       低通和带通滤波器版本
• 集成低噪声、低失真放大器
       固定增益：8dB、14dB、20dB 或 26dB
       50Ω、200Ω 或 400Ω 输入阻抗
• 集成旁路电容，无需外部元件
• 在高达 140MHz 输入频率条件下实现了 66dB SNR (LTM9002-AA)
• 在高达 140MHz 输入频率条件下实现了 76dB SFDR (LTM9002-AA)
• 用于增益调节的辅助 12 位 DAC
• 时钟占空比稳定器
• 单 3V 至 3.3V 电源
• 低功率：1.3W (每通道为 665mW)
• 停机和打盹模式
• 15mm x 11.25mm LGA 封装

description

The LTM®9002 is a 14-bit, dual-channel IF receiver subsystem. The device utilizes an integrated system-in-package (SiP) technology that includes a dual-channel high-speed 14-bit A/D converter, matching network, antialiasing filter, and two low-noise, differential amplifiers. It is designed for digitizing signals with a wide dynamic range (IF) of up to 300MHz. Amplifiers are available with AC or DC coupled input drives. Low-pass or bandpass filter networks with different bandwidths can be implemented. For information on custom configurations, please contact Linear Technology.

The LTM9002 is ideal for demanding communications applications, with AC performance including 66dB SNR and 76dB Parasitic Free Dynamic Range (SFDR). The secondary DAC is responsible for providing gain balance processing between the two channels.

A single 3V power supply enables low-power operation. A separate output supply enables the output to drive 0.5V to 3.3V logic devices. An optional multiplexer allows two channels to share a digital output bus. The two single-ended CLK inputs can be driven together or independently. An optional clock duty cycle stabilizer achieves high performance at full speed and in a variety of clock duty cycle conditions.

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• 电信
• 直接转换接收器
• 主接收器和分集接收器
• 蜂窝基站