MC68HC16Z1MAG16

• Product introduction

MC68HC16Z1MAG16Microcontrollers

characteristic

CPU16

• 16-bit architecture
• Full set of 16-bit registers
• Three 16-bit variable address registers
• 2 x 16-bit accumulators
• Control-oriented digital signal processing functions
• 1 megabyte of program storage and 1 megabyte of data storage
• High-level language support
• Fast interrupt response time
• Background Debugging Mode (BDM)
• Completely static operation

System Integration Module (SIM)

• External bus support
• The programmable chip selects the output
• System protection logic
• Watchdog timer, clock monitoring and bus monitoring
• Two 8-bit dual-function input/output ports
• 1 x 7-bit dual-function output
• Phase-locked loop (PLL) clock system

8/10-bit analog-to-digital converters (ADCs)

• 8 analog/digital channels
• 8 result registers
• 8 automatic modes
• 3 result calibration modes
• 1 x 8-digit input port

General Purpose Timer (GPT)

• Two 16-bit free-running counters with one 9-stage prescale
• 3 input capture channels
• 4 output comparison channels
• 1 input capture/output comparison channel
• 1 pulse accumulator/event counter input
• 2 PWM outputs
• 1 x 8-bit dual-function port
• 2 selectable discrete inputs
• Optional external clock input

2 Serial I/O Subsystems (QSM)

• Enhanced Serial Communication Interface (SCI)
• Analog-to-digital baud rate generator
• Parity test
• Queuing Serial Peripheral Interface (QSPI)
• 80 bytes of static RAM to perform queuing operations
• Up to 16 automatic transmissions
• Continuous loop, 8 to 16 heals per transmission, low priority (LSB) or high priority (MSB)
• Dual-function I/O pins

Spare RAM

• 1024 bytes of static RAM
• External backup supply voltage pin